1 Ocak 2016 Konferans bildirisi Açık Erişim

Gursoy, Cemil Cem; Yildiz, Abdullah; Goren, Sezer

DataCite XML

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  <identifier identifierType="URL">https://aperta.ulakbim.gov.tr/record/111812</identifier>
  <creators>
    <creator>
      <creatorName>Gursoy, Cemil Cem</creatorName>
      <givenName>Cemil Cem</givenName>
      <familyName>Gursoy</familyName>
      <affiliation>Yeditepe Univ, Dept Comp Engn, Istanbul, Turkey</affiliation>
    </creator>
    <creator>
      <creatorName>Yildiz, Abdullah</creatorName>
      <givenName>Abdullah</givenName>
      <familyName>Yildiz</familyName>
      <affiliation>Yeditepe Univ, Dept Comp Engn, Istanbul, Turkey</affiliation>
    </creator>
    <creator>
      <creatorName>Goren, Sezer</creatorName>
      <givenName>Sezer</givenName>
      <familyName>Goren</familyName>
      <affiliation>Yeditepe Univ, Dept Comp Engn, Istanbul, Turkey</affiliation>
    </creator>
  </creators>
  <titles>
    <title>On Optimization Of Multi-Cycle Tests For Test Quality And Application Time</title>
  </titles>
  <publisher>Aperta</publisher>
  <publicationYear>2016</publicationYear>
  <dates>
    <date dateType="Issued">2016-01-01</date>
  </dates>
  <resourceType resourceTypeGeneral="Text">Conference paper</resourceType>
  <alternateIdentifiers>
    <alternateIdentifier alternateIdentifierType="url">https://aperta.ulakbim.gov.tr/record/111812</alternateIdentifier>
  </alternateIdentifiers>
  <relatedIdentifiers>
    <relatedIdentifier relatedIdentifierType="DOI" relationType="IsVersionOf">10.81043/aperta.111811</relatedIdentifier>
    <relatedIdentifier relatedIdentifierType="DOI" relationType="IsIdenticalTo">10.81043/aperta.111812</relatedIdentifier>
  </relatedIdentifiers>
  <rightsList>
    <rights rightsURI="http://www.opendefinition.org/licenses/cc-by">Creative Commons Attribution</rights>
    <rights rightsURI="info:eu-repo/semantics/openAccess">Open Access</rights>
  </rightsList>
  <descriptions>
    <description descriptionType="Abstract">Multi-cycle scan-based tests allow more faults to be detected by keeping the circuit in functional mode for more than one clock cycle. Optimizing a multi-cycle test set can improve test quality and/or test application time. It is also possible to capture the primary outputs of a circuit multiple times between the scan operations. This ensures that if a fault is detected at the primary outputs, increasing functional clock cycles of the test does not cause loss of detection of that fault. This paper presents a procedure that produces a multi-cycle test set by optimizing a single-cycle test set for fault coverage and test application time while considering stuck-at, bridging and transition faults at the same time.</description>
  </descriptions>
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