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Gursoy, Cemil Cem; Yildiz, Abdullah; Goren, Sezer
{ "URL": "https://aperta.ulakbim.gov.tr/record/111812", "abstract": "Multi-cycle scan-based tests allow more faults to be detected by keeping the circuit in functional mode for more than one clock cycle. Optimizing a multi-cycle test set can improve test quality and/or test application time. It is also possible to capture the primary outputs of a circuit multiple times between the scan operations. This ensures that if a fault is detected at the primary outputs, increasing functional clock cycles of the test does not cause loss of detection of that fault. This paper presents a procedure that produces a multi-cycle test set by optimizing a single-cycle test set for fault coverage and test application time while considering stuck-at, bridging and transition faults at the same time.", "author": [ { "family": "Gursoy", "given": " Cemil Cem" }, { "family": "Yildiz", "given": " Abdullah" }, { "family": "Goren", "given": " Sezer" } ], "id": "111812", "issued": { "date-parts": [ [ 2016, 1, 1 ] ] }, "title": "On optimization of multi-cycle tests for test quality and application time", "type": "paper-conference" }
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