1 Ocak 2019 Dergi makalesi Açık Erişim

Levent, Vecdi Emre; Guzel, Aydin E.; Tosun, Mustafa; Buyukmihci, Mert; Aydin, Furkan; Goren, Sezer; Erbas, Cengiz; Akgun, Toygar; Ugurdag, H. Fatih

JSON-LD (schema.org)

{
  "@context": "https://schema.org/", 
  "@id": 72903, 
  "@type": "ScholarlyArticle", 
  "creator": [
    {
      "@type": "Person", 
      "affiliation": "Ozyegin Univ, Istanbul, Turkey", 
      "name": "Levent, Vecdi Emre"
    }, 
    {
      "@type": "Person", 
      "affiliation": "Ozyegin Univ, Istanbul, Turkey", 
      "name": "Guzel, Aydin E."
    }, 
    {
      "@type": "Person", 
      "affiliation": "Ozyegin Univ, EEE, Istanbul, Turkey", 
      "name": "Tosun, Mustafa"
    }, 
    {
      "@type": "Person", 
      "name": "Buyukmihci, Mert"
    }, 
    {
      "@type": "Person", 
      "affiliation": "Ozyegin Univ, Istanbul, Turkey", 
      "name": "Aydin, Furkan"
    }, 
    {
      "@type": "Person", 
      "affiliation": "Yeditepe Univ, Elect & Elect Engn, Istanbul, Turkey", 
      "name": "Goren, Sezer"
    }, 
    {
      "@type": "Person", 
      "affiliation": "Aselsan, Ankara, Turkey", 
      "name": "Erbas, Cengiz"
    }, 
    {
      "@type": "Person", 
      "affiliation": "Aselsan, Ankara, Turkey", 
      "name": "Akgun, Toygar"
    }, 
    {
      "@type": "Person", 
      "affiliation": "Ozyegin Univ, Istanbul, Turkey", 
      "name": "Ugurdag, H. Fatih"
    }
  ], 
  "datePublished": "2019-01-01", 
  "description": "This paper describes flexible tools and techniques that can be used to efficiently design/generate quite a variety of hardware IP blocks for highly parameterized real-time video processing algorithms. The tools and techniques discussed in the paper include host software, FPGA interface IP (PCIe, USB 3.0, DRAM), high-level synthesis, RTL generation tools, synthesis automation as well as architectural concepts (e.g., nested pipelining), an architectural estimation tool, and verification methodology. The paper also discusses a specific use case to deploy the mentioned tools and techniques for hardware design of an optical flow algorithm. The paper shows that in a fairly short amount of time, we were able to implement 11 versions of the optical flow algorithm running on 3 different FPGAs (from 2 different vendors), while we generated and synthesized several thousand designs for architectural trade-off.", 
  "headline": "Tools and Techniques for Implementation of Real-time Video Processing Algorithms", 
  "identifier": 72903, 
  "image": "https://aperta.ulakbim.gov.tr/static/img/logo/aperta_logo_with_icon.svg", 
  "license": "http://www.opendefinition.org/licenses/cc-by", 
  "name": "Tools and Techniques for Implementation of Real-time Video Processing Algorithms", 
  "url": "https://aperta.ulakbim.gov.tr/record/72903"
}