Dergi makalesi Açık Erişim
Khan, Mohd Tasleem; Yantir, Hasan Erdem; Salama, Khaled Nabil; Eltawil, Ahmed M.
<?xml version='1.0' encoding='utf-8'?>
<resource xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns="http://datacite.org/schema/kernel-4" xsi:schemaLocation="http://datacite.org/schema/kernel-4 http://schema.datacite.org/meta/kernel-4.1/metadata.xsd">
<identifier identifierType="URL">https://aperta.ulakbim.gov.tr/record/265184</identifier>
<creators>
<creator>
<creatorName>Khan, Mohd Tasleem</creatorName>
<givenName>Mohd Tasleem</givenName>
<familyName>Khan</familyName>
<affiliation>Indian Inst Technol, Indian Sch Mines, Dept Elect Engn, Dhanbad 826004, Jharkhand, India</affiliation>
</creator>
<creator>
<creatorName>Yantir, Hasan Erdem</creatorName>
<givenName>Hasan Erdem</givenName>
<familyName>Yantir</familyName>
<affiliation>TUBITAK Informat & Informat Secur Res Ctr, TR-41470 Kocaeli, Turkiye</affiliation>
</creator>
<creator>
<creatorName>Salama, Khaled Nabil</creatorName>
<givenName>Khaled Nabil</givenName>
<familyName>Salama</familyName>
<affiliation>King Abdullah Univ Sci & Technol, Dept Comp Elect & Math Sci & Engn CEMSE Div, Elect & Comp Engn Program, Thuwa 23955, Saudi Arabia</affiliation>
</creator>
<creator>
<creatorName>Eltawil, Ahmed M.</creatorName>
<givenName>Ahmed M.</givenName>
<familyName>Eltawil</familyName>
<affiliation>King Abdullah Univ Sci & Technol, Dept Comp Elect & Math Sci & Engn CEMSE Div, Elect & Comp Engn Program, Thuwa 23955, Saudi Arabia</affiliation>
</creator>
</creators>
<titles>
<title>Architectural Trade-Off Analysis For Accelerating Lstm Network Using Radix-<I>R</I> Obc Scheme</title>
</titles>
<publisher>Aperta</publisher>
<publicationYear>2023</publicationYear>
<dates>
<date dateType="Issued">2023-01-01</date>
</dates>
<resourceType resourceTypeGeneral="Text">Journal article</resourceType>
<alternateIdentifiers>
<alternateIdentifier alternateIdentifierType="url">https://aperta.ulakbim.gov.tr/record/265184</alternateIdentifier>
</alternateIdentifiers>
<relatedIdentifiers>
<relatedIdentifier relatedIdentifierType="DOI" relationType="IsIdenticalTo">10.1109/TCSI.2022.3217091</relatedIdentifier>
</relatedIdentifiers>
<rightsList>
<rights rightsURI="http://www.opendefinition.org/licenses/cc-by">Creative Commons Attribution</rights>
<rights rightsURI="info:eu-repo/semantics/openAccess">Open Access</rights>
</rightsList>
<descriptions>
<description descriptionType="Abstract"><p>This paper presents architectural trade-off analysis for accelerating two (Type I, II) fixed-point long short-term memory (LSTM) network based on circulant matrix-vector multiplications (MVMs) using radix -r offset binary coding (OBC) scheme. Type I MVM architecture rotates the weights with the proposed modulo-cum interleaver and uses partial product generators (PPGs) with a single generation unit across a column. It is hardware-optimized using a single adder tree through time multiplexing. Meanwhile, Type II MVM architecture rotates the inputs with the proposed store-cum interleaver and uses single PPGs with a single generation unit across a row. It is time optimized by unfolding shift-accumulate unit to a shift-add tree followed by pipelining. A new design for element-wise multiplication using radix -r PPG is also presented. Both the designs are extended to their block-circulant variants for certain accuracy requirements. Post-synthesis of Type I and II architectures for a different model, kernel, radix sizes and clock frequencies result in several efficient designs. Compared with the prior scheme, Type I architecture for 128x128 with r = 2 on 28 nm FDSOI technology at 800 MHz occupies 32.27% lesser area, consumes 67.89% lesser power at the same throughput, while Type II architecture at the expense of area and power provides 40x higher throughput.</p></description>
</descriptions>
</resource>
| Görüntülenme | 35 |
| İndirme | 4 |
| Veri hacmi | 916 Bytes |
| Tekil görüntülenme | 29 |
| Tekil indirme | 4 |