1 Ocak 2021 Dergi makalesi Açık Erişim

Aksoy, Levent; Akkan, Nihat; Sedef, Herman; Altun, Mustafa

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{
  "conceptrecid": "237287", 
  "created": "2022-10-07T09:53:44.409873+00:00", 
  "doi": "10.1109/TCAD.2020.3035629", 
  "files": [
    {
      "bucket": "1d8fd5d2-8a37-4c3f-aa96-766919dec9ea", 
      "checksum": "md5:59439d5af4d6b0fc3c37085b53ae9d7c", 
      "key": "bib-7f8f1a52-0a92-4081-bb96-c6f8419035b4.txt", 
      "links": {
        "self": "https://aperta.ulakbim.gov.tr/api/files/1d8fd5d2-8a37-4c3f-aa96-766919dec9ea/bib-7f8f1a52-0a92-4081-bb96-c6f8419035b4.txt"
      }, 
      "size": 231, 
      "type": "txt"
    }
  ], 
  "id": 237288, 
  "links": {
    "badge": "https://aperta.ulakbim.gov.tr/badge/doi/10.1109/TCAD.2020.3035629.svg", 
    "bucket": "https://aperta.ulakbim.gov.tr/api/files/1d8fd5d2-8a37-4c3f-aa96-766919dec9ea", 
    "doi": "https://doi.org/10.1109/TCAD.2020.3035629", 
    "html": "https://aperta.ulakbim.gov.tr/record/237288", 
    "latest": "https://aperta.ulakbim.gov.tr/api/records/237288", 
    "latest_html": "https://aperta.ulakbim.gov.tr/record/237288"
  }, 
  "metadata": {
    "access_right": "open", 
    "access_right_category": "success", 
    "communities": [
      {
        "id": "tubitak-destekli-proje-yayinlari"
      }
    ], 
    "creators": [
      {
        "affiliation": "Istanbul Tech Univ, Dept Elect & Commun Engn, Emerging Circuits & Computat Grp, TR-34469 Istanbul, Turkey", 
        "name": "Aksoy, Levent"
      }, 
      {
        "affiliation": "Yildiz Tech Univ, Dept Elect & Commun Engn, TR-34220 Istanbul, Turkey", 
        "name": "Akkan, Nihat"
      }, 
      {
        "affiliation": "Yildiz Tech Univ, Dept Elect & Commun Engn, TR-34220 Istanbul, Turkey", 
        "name": "Sedef, Herman"
      }, 
      {
        "affiliation": "Istanbul Tech Univ, Dept Elect & Commun Engn, Emerging Circuits & Computat Grp, TR-34469 Istanbul, Turkey", 
        "name": "Altun, Mustafa"
      }
    ], 
    "description": "Switching lattices, consisting of four-terminal switches, present an alternative structure for the realization of Boolean logic functions. Although promising algorithms have been introduced to find a realization of a logic function using a switching lattice with the fewest number of four-terminal switches, the delay of a switching lattice has not been examined yet. In this article, we generate a switching lattice using a recently proposed CMOS-compatible four-terminal device model and formulate the delay of a path in a switching lattice. It is observed that the delay of a design realizing a logic function on a switching lattice heavily depends on the number of four-terminal switches in the critical path. With this motivation, we introduce optimization algorithms, called PHAEDRA and TROADES, which can find the realization of a logic function on a switching lattice with the fewest number of switches under a delay constraint given in terms of the number of switches in the critical path. While PHAEDRA is a dichotomic search algorithm that can obtain solutions with a small number of switches on small size logic functions, TROADES is a divide-and-conquer method that can find a solution using less computational effort and can easily handle larger size logic functions with respect to PHAEDRA. The experimental results show that the proposed algorithms can reduce the delay of a lattice realization of a logic function significantly at a cost of an increase in the number of switches. They can explore alternative lattice realizations of a logic function by changing the delay constraint, enabling a designer to choose the one that fits best in an application.", 
    "doi": "10.1109/TCAD.2020.3035629", 
    "has_grant": false, 
    "journal": {
      "issue": "10", 
      "pages": "2036-2048", 
      "title": "IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS", 
      "volume": "40"
    }, 
    "license": {
      "id": "cc-by"
    }, 
    "publication_date": "2021-01-01", 
    "relations": {
      "version": [
        {
          "count": 1, 
          "index": 0, 
          "is_last": true, 
          "last_child": {
            "pid_type": "recid", 
            "pid_value": "237288"
          }, 
          "parent": {
            "pid_type": "recid", 
            "pid_value": "237287"
          }
        }
      ]
    }, 
    "resource_type": {
      "subtype": "article", 
      "title": "Dergi makalesi", 
      "type": "publication"
    }, 
    "science_branches": [
      "Di\u011fer"
    ], 
    "title": "Realization of Logic Functions Using Switching Lattices Under a Delay Constraint"
  }, 
  "owners": [
    1
  ], 
  "revision": 1, 
  "stats": {
    "downloads": 5.0, 
    "unique_downloads": 5.0, 
    "unique_views": 13.0, 
    "version_downloads": 5.0, 
    "version_unique_downloads": 5.0, 
    "version_unique_views": 13.0, 
    "version_views": 13.0, 
    "version_volume": 1155.0, 
    "views": 13.0, 
    "volume": 1155.0
  }, 
  "updated": "2022-10-07T09:53:44.458456+00:00"
}