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FPGA implementation of a run-time configurable NTT-based polynomial multiplication hardware

Mert, Ahmet Can; Ozturk, Erdinc; Savas, Erkay


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{
  "@context": "https://schema.org/", 
  "@id": 9707, 
  "@type": "ScholarlyArticle", 
  "creator": [
    {
      "@type": "Person", 
      "affiliation": "Sabanci Univ, Fac Engn & Nat Sci, Istanbul, Turkey", 
      "name": "Mert, Ahmet Can"
    }, 
    {
      "@type": "Person", 
      "affiliation": "Sabanci Univ, Fac Engn & Nat Sci, Istanbul, Turkey", 
      "name": "Ozturk, Erdinc"
    }, 
    {
      "@type": "Person", 
      "affiliation": "Sabanci Univ, Fac Engn & Nat Sci, Istanbul, Turkey", 
      "name": "Savas, Erkay"
    }
  ], 
  "datePublished": "2020-01-01", 
  "description": "Multiplication of polynomials of large degrees is the predominant operation in lattice-based cryptosystems in terms of execution time. This motivates the study of its fast and efficient implementations in hardware. Also, applications such as those using homomorphic encryption need to operate with polynomials of different parameter sets. This calls for design of configurable hardware architectures that can support multiplication of polynomials of various degrees and coefficient sizes.", 
  "headline": "FPGA implementation of a run-time configurable NTT-based polynomial multiplication hardware", 
  "identifier": 9707, 
  "image": "https://aperta.ulakbim.gov.tr/static/img/logo/aperta_logo_with_icon.svg", 
  "license": "http://www.opendefinition.org/licenses/cc-by", 
  "name": "FPGA implementation of a run-time configurable NTT-based polynomial multiplication hardware", 
  "url": "https://aperta.ulakbim.gov.tr/record/9707"
}
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