1 Ocak 2021 Dergi makalesi Açık Erişim

Yildirim, Melih

DataCite XML

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  <identifier identifierType="URL">https://aperta.ulakbim.gov.tr/record/239720</identifier>
  <creators>
    <creator>
      <creatorName>Yildirim, Melih</creatorName>
      <givenName>Melih</givenName>
      <familyName>Yildirim</familyName>
      <affiliation>Sci &amp; Technol Res Council Turkey TUBITAK, Ankara, Turkey</affiliation>
    </creator>
  </creators>
  <titles>
    <title>Analog Circuit Implementation Based On Median Filter For Salt And Pepper Noise Reduction In Image</title>
  </titles>
  <publisher>Aperta</publisher>
  <publicationYear>2021</publicationYear>
  <dates>
    <date dateType="Issued">2021-01-01</date>
  </dates>
  <resourceType resourceTypeGeneral="Text">Journal article</resourceType>
  <alternateIdentifiers>
    <alternateIdentifier alternateIdentifierType="url">https://aperta.ulakbim.gov.tr/record/239720</alternateIdentifier>
  </alternateIdentifiers>
  <relatedIdentifiers>
    <relatedIdentifier relatedIdentifierType="DOI" relationType="IsIdenticalTo">10.1007/s10470-021-01820-3</relatedIdentifier>
  </relatedIdentifiers>
  <rightsList>
    <rights rightsURI="http://www.opendefinition.org/licenses/cc-by">Creative Commons Attribution</rights>
    <rights rightsURI="info:eu-repo/semantics/openAccess">Open Access</rights>
  </rightsList>
  <descriptions>
    <description descriptionType="Abstract">In this study, an analog circuit design instead of using a software is utilized to remove Salt and Pepper (S&amp;amp;P) noise in image. For this purpose, a digital image filtering method which is called median filter is carried out. In median filter method, a current-mode nine-input one-output circuit architecture is preferred since 3 x 3 filtering mask is employed. Median filter circuit is based on a modified bitonic sort network and consists of 26 max/min selector circuits. A current-mode two-input two-output circuit is designed as a max/min selector and there is no biasing current source in the max/min selector structure. In analysis part, two 150 x 150 images with different amount of S&amp;amp;P noise are used and the noise in image is successfully reduced with the help of the proposed circuit design. The performance of the suggested median filter is also verified through the quality measurement parameters such as Structural Similarity Index Metric, Mean Squared Error, Mean Absolute Error and Peak Signal to Noise Ratio. TSMC CMOS 0.18 mu m process model is utilized to simulate the introduced median filter circuit.</description>
  </descriptions>
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