Published January 1, 2019
| Version v1
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A High Voltage PIN Diode Design on SOI Substrate
Creators
- 1. Kocaeli Univ, Dept Elect & Commun Engn, TR-41380 Izmit, Turkey
- 2. TUBITAK BILGEM UEKAE, Semicond Res Lab, Gebze, Kocaeli, Turkey
Description
This study is summary of the design optimization steps for a high voltage lateral silicon PIN diode on SOI substrate. The process simulations are realized using TCAD-SENTAURUS-SPROCESS design platform. The main purpose is to increase the reverse breakdown voltage of the PIN diode as high as possible. The design optimization process includes not only the chemical fabrication process details (such as doping concentration levels, dose amounts of the implants, temperature set values, duration of annealing or drive in processes) but also geometrical dimensions (such as length and thickness values of the layers). After the process simulations are completed, the electrical simulations are done using TCAD-SDEVICE platform to see the results. Finally, the design details of a PIN diode having a breakdown voltage of 600 V are reached. The scientific contribution of the paper is the proposed application of the well-known RESURF technique with field plate to increase the lateral breakdown voltage of silicon PIN diode. Also, a stepped implant structure is preferred on the cathode side. The paper includes most of the intermediate results and discussions of the optimization steps conducted during the research. The transient and ac sdevice electrical simulations are also completed but are not included in this paper. (C) 2019 Elsevier Ltd. All rights reserved.
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