Published January 1, 2019
| Version v1
Journal article
Open
Tools and Techniques for Implementation of Real-time Video Processing Algorithms
Creators
- 1. Ozyegin Univ, Istanbul, Turkey
- 2. Ozyegin Univ, EEE, Istanbul, Turkey
- 3. Yeditepe Univ, Elect & Elect Engn, Istanbul, Turkey
- 4. Aselsan, Ankara, Turkey
Description
This paper describes flexible tools and techniques that can be used to efficiently design/generate quite a variety of hardware IP blocks for highly parameterized real-time video processing algorithms. The tools and techniques discussed in the paper include host software, FPGA interface IP (PCIe, USB 3.0, DRAM), high-level synthesis, RTL generation tools, synthesis automation as well as architectural concepts (e.g., nested pipelining), an architectural estimation tool, and verification methodology. The paper also discusses a specific use case to deploy the mentioned tools and techniques for hardware design of an optical flow algorithm. The paper shows that in a fairly short amount of time, we were able to implement 11 versions of the optical flow algorithm running on 3 different FPGAs (from 2 different vendors), while we generated and synthesized several thousand designs for architectural trade-off.
Files
bib-4fa9a723-94d9-44bd-915f-4e4afd996dc3.txt
Files
(287 Bytes)
| Name | Size | Download all |
|---|---|---|
|
md5:63804cd0946a9dfc4d850ce826f1bb13
|
287 Bytes | Preview Download |