A 1.5-b Front-end Sub-ADC with Symmetrical Cross Coupled Bootstrap and Adaptive Power/Ground Switches for GS/s Sampling Rate SHA-less Pipeline ADCs

In this work, a 1.5-h front-end sub-ADC with bootstrap and cross coupled adaptive power/ground switches and logics for a 11-b 1.6 GS/s sampling pipeline ADC is introduced. That 1.5-b sub-ADC avoids a dedicated sample-and-hold amplifier (SHA-less) to lower power dissipation. The design, totally, consuming 19 2 mA at a supply of 1.2 V, and, 7.2 mA at a supply of 1.6 V, occupying 156 mu m x 205 mu m silicon area, is realized in a SiGe BiCMOS 0.13 mu m process.