Modelling and Realization of a Water-Gated Field Effect Transistor (WG-FET) Using 16-nm-Thick Mono-Si Film

We introduced a novel water-gated field effect transistor (WG-FET) which uses 16-nm-thick mono-Si film as active layer. WG-FET devices use electrical double layer (EDL) as gate insulator and operate under 1V without causing any electrochemical reactions. Performance parameters based on voltage distribution on EDL are extracted and current-voltage relations are modelled. Both probe-and planargate WG-FETs with insulated and uninsulated source-drain electrodes are simulated, fabricated and tested. Best on/off ratios are measured for probe-gate devices as 23,000 A/A and 85,000 A/A with insulated and uninsulated source-drain electrodes, respectively. Planar-gate devices with sourcedrain insulation had inferior on/off ratio of 1,100 A/A with 600 mu m gate distance and it decreased to 45 A/A when gate distance is increased to 3000 mu m. Without source-drain electrode insulation, proper transistor operation is not obtained with planar-gate devices. All measurement results were in agreement with theoretical models. WG-FET is a promising device platform for microfluidic applications where sensors and read-out circuits can be integrated at transistor level.