Universal On-Chip Polarization Handling With Deep Photonic Networks

We propose a systematic approach to design complex and universally capable deep photonic networks with inherent robustness to fabrication-induced variations. We first create a framework that incorporates layers of variation-aware, custom-designed Mach-Zehnder interferometers, and virtual wafer maps to optimize broadband power splitters under fabrication variations. Specifically, we demonstrate designs for broadband 50/50 splitters with transmission deviations within +/- 2% of the target and 5% power taps with deviations within +/- 1.5%, even under fabrication imperfections of +/- 15 nm in waveguide width and +/- 10 nm in thickness. The significantly improved device performance under fabrication-induced changes demonstrates the effectiveness of the deep photonic network architecture in designing fabrication-tolerant photonic devices, and showcases the potential for improving circuit performance by optimizing for expected variations in waveguide dimensions.