Simulink-Based HDL Design: A Case Study on Harmonic Control Arrays Algorithm Realization

In this paper, a novel control algorithm, namely the HCA algorithm, is implemented utilizing the HDL Toolbox of MATLAB's Simulink environment. Through the graphical design interface, register transfers, arithmetic operations, integrator designs, and analogous discrete control blocks are realized without RTL coding. Furthermore, the system is simulated and compared with conventional Simulink control blocks. Consequently, both HDL and MATLAB's native blocks are simulated concurrently to verify complex control blocks. Additionally, fixed-point arithmetic can be implemented by specifying the number of bits and fractions for each design block via a graphical user interface, which is typically an arduous process to monitor precision and overflow. Dynamic adjustment of the number of bits also optimizes the synthesized block sizes efficiently. As a case study, the Harmonic Control Arrays (HCA) algorithm is implemented utilizing Simulink and AMD Toolbox, in conjunction with Xilinx's Vitis platform. The HCA block is synthesized and verified in Xilinx's Vivado platform with HDL test bench. The testbench results demonstrate strong agreement with Simulink's simulation results. Consequently, the HCA control algorithm is synthesized and validated with a composite platform, effectively providing design flexibility and testability. The synthesized block passed the timing analysis test for 40 ns delay, yielding a sampling speed of 25 MHz of performance for the Artix-7 series FPGAs.