Enhancing hole mobility in p-type thin-film transistors: the impact of annealing in air on intrinsic and p<SUP>+</SUP> μc-Si:H films deposited at 100 °C

P-type bottom gate (BG) microcrystalline silicon (mu c-Si:H) thin-film transistors (TFTs) were fabricated utilizing intrinsic and p+ mu c-Si:H films grown at a low process temperature of 100 degrees C via plasma-enhanced chemical vapor deposition (PECVD) technique. The study explored the impact of 10-min annealing treatment within the temperature range of 200-350 degrees C on the hole mobility in both p+ mu c-Si:H films and BG TFTs. The as-grown p+ mu c-Si:H films exhibited notably high hole mobilities compared to the usual values, with further enhancement observed after annealing in air (2-3 cm2/(V s)). As for the field-effect mobility of p-type BG TFTs, it was within the usual range for the fresh devices. Similar to the mobility improvement in p+ films, the p-type TFT mobility experienced a significant increase following annealing in air, compared to vacuum annealing. Further subjection of the TFT to annealing in air at elevated temperatures up to 350 degrees C resulted in a progressive enhancement in field-effect mobility up to similar to 0.13 cm2/(V s). Other important consequences are the decrease in the TFT threshold voltage and the improvement in its electrical stability. These findings emphasize the importance of applying a simple and short low-temperature annealing treatment in air for advancing the p-type BG mu c-Si:H TFT performance, thereby rendering them viable for CMOS applications. The mechanism underlying this positive effect of the annealing in air was investigated by the attenuated-total-reflection (ATR) Fourier transform infrared (FTIR), Ultraviolet-Visible-near infrared (UV-VIS-NIR) spectroscopies, and computer simulations of the TFT transfer characteristics.