Accelerating DTLS on SoC FPGA for secure IoT applications

In the realm of embedded systems and IoT, efficiency and security are among paramount challenges. Datagram Transport Layer Security (DTLS) plays a crucial role in securing IoT communication, but it often imposes significant computational overhead. Stemming from these observations, this study introduces an innovative solution using an System-on-Chip (SoC) Field Programmable Gate Array (FPGA) to address these challenges. Notably, the study effectively demonstrates the integration of DTLS acceleration into the IoT network stack, utilizing the inherent Application-Specific Integrated Circuit (ASIC) cryptographic accelerators embedded within the SmartFusion2 SoC FPGA. The detailed experiments have been conducted for the comparison of the developed hardware with a software implementation of DTLS. The results are remarkable, showcasing substantial gains in key metrics. These improvements include a performance increase of 8 times, a latency reduction of 8.1 times, and a decrease in power consumption of 1.5 times. In summary, this study highlights the crucial role of hardware acceleration, enabled by heterogeneous computing units on a single chip, in enhancing IoT security. The findings underscore the value of SoC FPGAs as an a practical solution for enabling secure IoT communication across a spectrum of IoT applications.